(Paper #184)
A hardware managed register stack, Register Stack Engine (RSE), is implemented in Itanium Ú architecture to provide a unified and flexible register structure to software. Every procedure can be allocated with a register stack frame with its size explicitly specified by the compiler via an alloc instruction. When the registers used from the procedures on the call stack exceeds the number of physical registers, RSE performs automatically register overflows and fills. The virtual register stack frames and RSE alleviate the need of explicit spills by a compiler, but clearly there is a trade-off between using stacked registers and explicit spills under high register pressure due to the uneven cost between them. In this work, we introduce the stacked register quota assignment problem based on the observation that reducing stacked register usage in some procedures could reduce the total memory access time of spilling registers, which includes the time caused by the load/store due to explicit register spills and RSE overflows/fills. We propose a new inter-procedural algorithm to solve the problem of allocating stacked registers across procedures based on a quantitative cost model. We observe from the implementation and evaluation of this method that performance can be improved significantly for the programs with high RSE overflow cost, e.g. perlbmk and crafty, improved by 14% and 3.7%, respectively.
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